Study of an SOI SRAM sensitivity to SEU by 3-D device Simulation

K. Castellani-Coulié (1) , B. Sagnes (1) , Frédéric Saigné (1) , J.-M. Palau (1) , M.-C. Calvet , P.E. Dodd , F.W. Sexton

1 CEM2 - Centre d'Electronique et de Micro-optoélectronique de Montpellier

Silicon on insulator static random-access memory cell sensitivity to single event upset is studied. Currents and sensitive regions are then considered. Because of the buried oxide, the main part of these results appears to be different to that for bulk technologies.

Domaines: Electronique

K. Castellani-Coulié, B. Sagnes, Frédéric Saigné, J.-M. Palau, M.-C. Calvet, et al.. Study of an SOI SRAM sensitivity to SEU by 3-D device Simulation. IEEE Transactions on Nuclear Science, 2004, 51 (5), pp.2799 - 2804. ⟨10.1109/TNS.2004.835076⟩. ⟨hal-00327728⟩