Communication synthesis and HW/SW integration for embedded system design
Abstract
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardware and software components together and providing communications between them are particularly error prone and time consuming tasks. Hence, on the basis of a generic architecture we propose an extended communication synthesis method that provides characterization of communications and their implementation scheme in the target architecture. This method takes place after partitioning and scheduling and can constitute the basis of a back end of a codesign framework leading to HW/SW integration.
Keywords
hardware accelerators
Computer architecture
Signal processing algorithms
generic architecture
partitioning
scheduling
Embedded system
Hardware
Signal synthesis
Application software
Digital signal processing
Concurrent computing
Prototypes
real-time systems
protocols
logic design
logic partitioning
systems analysis
communication synthesis
HW/SW integration
embedded system design
codesign applications
heterogeneous resources
processor cores