An Analysis and Design Technique to Reduce SET Sensitivity in Combinational Integrated Circuits

C. Lazzari (1) , T. Assis (2) , F. Kastensmidt (1) , G. Wirth (2) , Lorena Anghel (3) , Ricardo Reis (1)

1 DELET
2 Vanderbilt University [Nashville]
3 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

Domaines: Micro et nanotechnologies/Microélectronique

C. Lazzari, T. Assis, F. Kastensmidt, G. Wirth, Lorena Anghel, et al.. An Analysis and Design Technique to Reduce SET Sensitivity in Combinational Integrated Circuits. 16th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-Soc'08), Oct 2008, Rhodes Island, Greece. pp.114-117. ⟨hal-01408783⟩