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Communication Dans Un Congrès Année : 2013

Validation of neural networks onto FPGA

Laurent Rodriguez
Laurent Fiack
Benoit Miramond

Résumé

Recent works in artificial neural networks simulation showed that sizable networks, of the order of thousands of mammalian neurons, are now achievable. In the domain of microelectronics, rapid prototyping of complex hardware neural networks (hundreds) is still a major challenge for executing in real-time high-level cognitive tasks onto FPGAs. This paper addresses the related problem of validating these complex networks when the observation on the chip interface of the whole system, specially the high number of internal signals, is not feasible anymore. We present a validation methodology covering the different design steps, from high-level modeling and simulation to on-board level debugging.
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Dates et versions

hal-01199370 , version 1 (15-09-2015)

Identifiants

  • HAL Id : hal-01199370 , version 1

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Laurent Rodriguez, Laurent Fiack, Benoit Miramond, Erik Hochapfel. Validation of neural networks onto FPGA. International Workshop on Neuromorphic and Brain-Based Computing Systems (NeuComp 2013 / DATE), DATE, Mar 2013, Grenoble, France. ⟨hal-01199370⟩
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