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Conference papers

Fast and efficient dataflow graph generation

Bruno Bodin 1 Youen Lesparre 2 Jean-Marc Delosme 3 Alix Munier-Kordon 2
1 School of Informatics [Edimbourg]
2 ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce
LIP6 - Laboratoire d'Informatique de Paris 6
3 IBISC - Informatique, Biologie Intégrative et Systèmes Complexes
Abstract : Dataflow modeling is a highly regarded method for the design of embedded systems. Measuring the performance of the associated analysis and compilation tools requires an efficient dataflow graph generator. This paper presents a new graph generator for Phased Computation Graphs (PCG), which augment Cyclo-Static Dataflow Graphs with both initial phases and thresholds. A sufficient condition of liveness is first extended to the PCG model. The determination of initial conditions minimizing the total amount of initial data in the channels and ensuring liveness can then be expressed using Integer Linear Programming. This contribution and other improvements of previous works are incorporated in Turbine, a new dataflow graph generator. Its effectiveness is demonstrated experimentally by comparing it to two existing generators, DFTools and SDF3.
Keywords : CSDFG Cyclo-static dataflow graph Initial markings Normalization PCG Phased computation graph Random generation SDFG Synchronous dataflow graph
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Conference papers
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https://hal.archives-ouvertes.fr/hal-01084899
Contributor : Frédéric Davesne Connect in order to contact the contributor
Submitted on : Thursday, November 20, 2014 - 12:11:55 PM
Last modification on : Thursday, November 25, 2021 - 3:45:53 AM

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IBISC | IBISC-AROBAS | UPMC | CNRS | UNIV-EVRY | LIP6 | SORBONNE-UNIVERSITE | SU-SCIENCES | SU-TI

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Bruno Bodin, Youen Lesparre, Jean-Marc Delosme, Alix Munier-Kordon. Fast and efficient dataflow graph generation. 17th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2014), Jun 2014, Schloss RheinfelsSt. Goar, Germany. pp.40--49, ⟨10.1145/2609248.2609258⟩. ⟨hal-01084899⟩

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