A low power 5MS/s 14 bit switched capacitors digital to analog converter

L. Gallin-Martel (1) , Daniel Dzahini (1) , F. Rarbi (1) , O. Rossetto (1)

1 LPSC - Laboratoire de Physique Subatomique et de Cosmologie

The ILC ECAL front-end chip will integrate many functions of the readout electronics including a DAC dedicated to the calibration. We present a 14 bit DAC, designed in a CMOS 0.35 μm process and based on segmented arrays of switched capacitors controlled by a Dynamic Element Matching (DEM) algorithm. This DAC features an INL lower than 0.5 LSB at 5 MHz, and dissipates less than 7 mW.

Mots clés: Digital to analog converter; dynamic element matching; switched capacitors

Domaines: Micro et nanotechnologies/Microélectronique; Instrumentations et Détecteurs [physics.ins-det]

L. Gallin-Martel, Daniel Dzahini, F. Rarbi, O. Rossetto. A low power 5MS/s 14 bit switched capacitors digital to analog converter. IEEE International Conference on Integrated Circuit Design and Technology (ICICDT), Jun 2010, Grenoble, France. pp.240-243. ⟨in2p3-00488840⟩