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Communication Dans Un Congrès Année : 2008

HARDROC1, readout chip of the Digital HAdronic CALorimeter of ILC

Résumé

HARDROC is a complete readout chip in SiGe 0.35 mum of the RPCs or GEMs foreseen for a digital hadronic calorimeter (DHCAL) at the ILC. The ASIC integrates 64 channels of (1) Fast low impedance current preamplifier with 6 bits variable gain (tunable between 0 and 4) (2) Variable shaper (75-150 ns) and track and hold to provide a multiplexed analog charge output up to 10 pC. (3) Variable gain fast shaper (15 ns) followed by two low offset discriminators to autotrig down to 10 fC. The thresholds are loaded by two internal 10 bit-DACs. (4) A 128 deep digital memory to store the 2*64 discriminator outputs and bunch crossing identification coded over 24 bits counter. The design and measured performance of the chip will be presented.
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Dates et versions

in2p3-00415894 , version 1 (11-09-2009)

Identifiants

Citer

S. Callier, F. Dulucq, C. de La Taille, G. Martin-Chassard, N. Seguin-Moreau, et al.. HARDROC1, readout chip of the Digital HAdronic CALorimeter of ILC. IEEE Nuclear Science Symposium/Medical Imaging Conference, Oct 2007, Honolulu, United States. pp.1851-1856, ⟨10.1109/NSSMIC.2007.4436518⟩. ⟨in2p3-00415894⟩
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