Voltage Multiplier Design for Harmonic Communication in Harvester Assisted Ultrahigh Frequency (UHF) Radio Frequency Identification (RFID) Systems
Résumé
The development of low-cost environmental energy harvesters is opening new opportunities for harvester-assisted semipassive radio frequency identification (RFID) tags. In these systems, the tag to reader communication raises a design concern as it is the limiting factor of the maximum communication range. Harmonic communication is an option for enhancing this tag to reader communication in ultrahigh frequency RFID systems. In this work, different voltage multiplier (VM) configurations are evaluated at the simulation level to suggest VM design guides to increase the available harmonic power in harvester assisted scenarios. The results show that single-ended topologies with the minimum number of stages are preferred. Regarding the diode, a proposed modified p-channel metal-oxide semiconductor (PMOS) diode has shown higher generated harmonic power than typical Schottky diodes.