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Article Dans Une Revue IEEE Journal of the Electron Devices Society Année : 2021

Statistical and electrical modeling of FDSOI four-gate qubit MOS devices at room temperature

Tristan Meunier

Résumé

This paper presents an electrical characterization and a compact modeling of FD-SOI fourgate qubit MOS devices, carried out at room temperature and in linear regime. The main figures of merit are extracted from average drain current curves using Y – function method. Poisson solver-based simulations are performed to interpret the experimental data, in particular the influence among gates and the effective channel length modulation. Furthermore, a drain current matching analysis between gates is conducted, and the main variability parameters are extracted. Our results, despite the unconventional device engineering, show a variability performance comparable to the state-of-the-art 28nm FD-SOI technology. Finally, a Lambert function based model is developed to validate both the electrical and statistical characterization. It is assumed, according to the experimental data, that the four gate device can be modeled as the series of four identical and independent transistors. Including the contribution of source and drain access resistance it has been possible to reproduce the device behavior at high external gates voltages.

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hal-03455220 , version 1 (29-11-2021)

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Edoardo Catapano, Gerard Ghibaudo, Mikael Casse, Tadeu Mota Frutuoso, Bruna Cardoso Paz, et al.. Statistical and electrical modeling of FDSOI four-gate qubit MOS devices at room temperature. IEEE Journal of the Electron Devices Society, 2021, 9, pp.582-590. ⟨10.1109/JEDS.2021.3082201⟩. ⟨hal-03455220⟩
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