Robustness study of a fast protection method based on the gate-charge dedicated for SiC MOSFETs power device

Yazan Barazi (1) , Frédéric Richardeau (1) , Nicolas Rouger (1) , Jean-Marc Blaquière (1)

1 LAPLACE-CS - Convertisseurs Statiques

This paper focuses on the extensive robustness validation of a gate charge detection method designed for SiC MOSFETs under short-circuit operation, and, in terms of failure-modes. The benefits of having a fast (submicrosecond-150ns) detection method is illustrated by a 1D thermo-metallurgical simulation. This method is integrated owing to an optimized SMD/PCB technology (Surface-Mount Device/ Printed Circuit Board).

Mots clés: Power device; SiC MOSFET; Hard switching fault; Fault under load; Gate-charge; Robustness

Domaines: Energie électrique

Yazan Barazi, Frédéric Richardeau, Nicolas Rouger, Jean-Marc Blaquière. Robustness study of a fast protection method based on the gate-charge dedicated for SiC MOSFETs power device. Microelectronics Reliability, 2021, pp.114246. ⟨10.1016/j.microrel.2021.114246⟩. ⟨hal-03381405⟩