Stochastic bisimulation and performance evaluation in discrete time stochastic and deterministic Petri box calculus dtsdPBC
Résumé
We propose dtsdPBC, an extension with deterministically timed multiactions of discrete time stochastic and immediate Petri box calculus (dtsiPBC), previously presented by I.V. Tarasyuk, H. Macia and V. Valero. In dtsdPBC, non-negative integers specify deterministic multiactions with fixed (including zero) time delays. The step operational semantics is constructed via labeled probabilistic transition systems. The denotational semantics is defined on the basis of a subclass of labeled discrete time stochastic Petri nets with deterministic transitions. We also define step stochastic bisimulation equivalence of the algebraic expressions, used to compare the qualitative and quantitative behaviour of the specified processes. The consistency of the operational and denotational semantics of dtsdPBC up to that equivalence is established.
In order to evaluate performance in dtsdPBC, the corresponding semi-Markov chains and (reduced) discrete time Markov chains of the process-algebraic expressions are analyzed. We explain how step stochastic bisimulation equivalence of the expressions can be used to reduce their transition systems and underlying semi-Markov chains, as well as to compare the stationary behaviour. We prove that the equivalence guarantees coincidence of the functional and performance characteristics and therefore can be used to simplify performance analysis of the algebraic processes. In a case study, a method of modeling, performance evaluation and behaviour reduction for concurrent systems with discrete fixed and stochastic delays is applied to the generalized shared memory system with maintenance.
Mots clés
stochastic process algebra
stochastic Petri net
Petri box calculus
discrete time
stochastic multiaction
deterministic multiaction
transition system
operational semantics
stochastic transition
deterministic transition
dtsd-box
denotational semantics
Markov chain
performance evaluation
stochastic bisimulation
reduction
shared memory system
Domaines
Logique en informatique [cs.LO]
Origine : Fichiers produits par l'(les) auteur(s)