A greedy heuristic for distributing hard real-time applications on an IMA architecture

Abstract : Current avionics architectures use complex processors, which are shared by many avionics applications according Integrated Modular Avionics (IMA) concepts. Using less complex processors on small aircraft such as helicopters leads to a distributed IMA architecture. Thus the set of partitions has to be distributed on the set of available processors. This distribution has to deal with both schedulability constraints on each processor and end-to-end latency constraints for chains of communicating partitions. Several mapping approaches exist for various applicative contexts. An approach has been proposed in the context of avionics. It implements an exhaustive analysis of all possible mappings. Time needed to perform this exhaustive analysis is drastically limited by incrementally mapping avionics functions and checking both scheduling and end-to-end constraints at each step. This approach is able to map small avionics application. However, it doesn't scale well, mainly because the scheduling space quickly explodes. In this paper, we integrate a greedy heuristic in the approach, in order to limit the scheduling space. We show that the resulting approach scales much better and gives mapping results which are close to those of the exhaustive approach.
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Émilie Bérard-Deroche, Jean-Luc Scharbarg, Christian Fraboul. A greedy heuristic for distributing hard real-time applications on an IMA architecture. 12th IEEE International Symposium on Industrial Embedded Systems (SIES 2017), Jun 2017, Toulouse, France. pp.1-8, ⟨10.1109/SIES.2017.7993390⟩. ⟨hal-02348196⟩

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