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ProVer: an SMT-based approach for process verification

Abstract : Business processes are used to represent the enterprise’s business and services it delivers. They are also used as a means to enforce customer’s satisfaction and to create an added value to the company. It is then more than critical to seriously consider the design of such processes and to make sure that they are free of any kind of inconsistencies. This paper highlights the issues with current approaches for process verification and proposes a new approach called ProVer. Three important design decisions will be motivated: 1) the use of UML AD as a process modeling language, 2) the formalization of the UML AD concepts for process verification as well as a well-identified set of properties in first-order logic (FOL) and 3) the use of SMT (Satisfiability Modulo Theories) as a mean to verify properties spanning different process’s perspectives in a very optimal way. The originality of ProVer is the ability for non-experts to express properties on processes than span the control, data, time, and resource perspectives using the same tool.
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Submitted on : Friday, April 5, 2019 - 1:42:51 PM
Last modification on : Tuesday, January 4, 2022 - 3:55:38 AM


  • HAL Id : hal-02091071, version 1


Souheib Baarir, Reda Bendraou, Hakan Metin, Yoann Laurent. ProVer: an SMT-based approach for process verification. Model-Driven Engineering Verification & Validation, MoDELS Workshop, Oct 2018, Copenhague, Denmark. pp.555--562. ⟨hal-02091071⟩



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