(Invited) Challenges and Opportunities in the Design of Tunnel FETs: Materials, Device Architectures, and Defects

David Esseni (1) , Marco Pala (2) , Revelant A. (1) , P. Palestri (1) , M. Li (3) , G. Snider (3) , D. Jena (3) , H.G. Xing (3)

1 Università degli Studi di Udine - University of Udine [Italie]
2 IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation
3 UND - University of Notre Dame [Indiana]

Domaines: Micro et nanotechnologies/Microélectronique

David Esseni, Marco Pala, Revelant A., P. Palestri, M. Li, et al.. (Invited) Challenges and Opportunities in the Design of Tunnel FETs: Materials, Device Architectures, and Defects. 226th ECS and SMEQ Joint International Meeting: SiGe,Ge and Related Compounds: Materials, Processing and Devices 6, S. Kar, M. Houssa, H. Jagannathan, K. Kita, D. Landheer, D. Misra and S. Van Elshocht, Oct 2014, Cacun, Mexico. ⟨hal-02066006⟩