3DVLSI with CoolCube process: An alternative path to scaling

P. Batude (1) , C. Fenouillet-Beranger (1) , L. Pasini (1, 2, 3) , V. Lu (2, 1) , F. Deprat (1, 3) , L. Brunet (1) , B. Sklenard (1) , F. Piegas-Luce (1) , M. Cassé (1) , B. Mathieu (1) , O. Billoint (1) , G. Cibrario (1) , O. Turkyilmaz (1) , H. Sarhan (1) , S. Thuries (1) , L. Hutin (1) , S. Sollier (1) , J. Widiez (1) , L. Hortemel (1) , C. Tabone (1) , M. P. Samson (1) , B. Previtali (1) , N. Rambal (1) , F. Ponthenier (1) , J. Mazurier (1) , R. Beneyton (2) , M. Bidaud (2) , E. Josse (2) , E. Petitprez (2) , O. Rozeau (1) , M. Rivoire (2) , C. Euvard-Colnat (1) , A. Seignard (1) , F. Fournel (1) , L. Benaissa (1) , P. Coudrain (4) , P. Leduc (1) , J.M. Hartmann (1) , P. Besson (2) , S. Kerdiles (1) , C. Bout (1) , F. Nemouchi (1) , A. Royer (1) , C. Agraffeil (1) , G. Ghibaudo (3) , T. Signamarcheix (1) , M. Haond (2) , F. Clermidy (1) , O. Faynot (1) , M. Vinet (1)

1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
2 ST-CROLLES - STMicroelectronics [Crolles]
3 IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation
4 STMicroelectronics

3D VLSI with a CoolCube™ integration allows vertically stacking several layers of devices with a unique connecting via density above a million/mm 2 . This results in increased density with no extra cost associated to transistor scaling, while benefiting from gains in power and performance thanks to wire-length reduction. CoolCube™ technology leads to high performance top transistors with Thermal Budgets (TB) compatible with bottom MOSFET integrity. Key enablers are the dopant activation by Solid Phase Epitaxy (SPE) or nanosecond laser anneal, low temperature epitaxy, low k spacers and direct bonding. New data on the maximal TB bottom MOSFET can withstand (with high temperatures but short durations) offer new opportunities for top MOSFET process optimization.

Domaines: Micro et nanotechnologies/Microélectronique

P. Batude, C. Fenouillet-Beranger, L. Pasini, V. Lu, F. Deprat, et al.. 3DVLSI with CoolCube process: An alternative path to scaling. 2015 IEEE Symposium on VLSI Technology, Jun 2015, Kyoto, Japan. pp.T48-T49, ⟨10.1109/VLSIT.2015.7223698⟩. ⟨hal-02049760⟩