Experimental Demonstration of Operational Z 2 -FET Memory Matrix

Santiago Navarro (1) , Carlos Marquez (1) , Hassan El Dirani (2) , Philippe Galy (2) , Maryline Bawedin (3) , Andy Pickering (4) , Sorin Cristoloveanu (3) , Francisco Gamiz (1)

1 UGR - Universidad de Granada = University of Granada
2 ST-CROLLES - STMicroelectronics [Crolles]
3 IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation
4 Surecore, Leeds

In this letter, a functional Z 2 -FET DRAM memory matrix is experimentally demonstrated for the first time. Word-level operation with simultaneous reading and programming accesses is successfully proved. Disturbance is also explored, and the results demonstrate bitline disturbance immunity. Furthermore, the fabricated memory matrix, which includes only one selector per word-line, facilitates the scalability of the memory for increasing array dimensions.

Mots clés: Array; diode; DRAM; matrix; p-i-n; silicon on insulator; Z²-FET

Domaines: Micro et nanotechnologies/Microélectronique

Santiago Navarro, Carlos Marquez, Hassan El Dirani, Philippe Galy, Maryline Bawedin, et al.. Experimental Demonstration of Operational Z 2 -FET Memory Matrix. IEEE Electron Device Letters, 2018, 39 (5), pp.660-663. ⟨10.1109/LED.2018.2819801⟩. ⟨hal-02006998⟩