Synchronous Full-Adder based on Complementary Resistive Switching Memory Cells

Y Zhang (1) , Erya y Deng (1) , Jacques-Olivier O Klein (1) , Damien Querlioz (1) , Dafiné Ravelosona (1) , Claude Chappert (1) , Weisheng S Zhao (2, 1) , Mathieu Moreau (3) , Jean-Michel Portal (3) , Marc Bocquet (3) , Hassen Aziza (3) , Damien Deleruyelle (3) , C Muller

1 IEF - Institut d'électronique fondamentale
2 BUAA - Beihang University
3 IM2NP - Institut des Matériaux, de Microélectronique et des Nanosciences de Provence

Emerging non-volatile memories (NVM) such as STT-MRAM and OxRRAM are under intense investigation by both academia and industries. They are based on resistive switching mechanisms and promise advantageous performances in terms of access speed, power consumption and endurance (i.e. >10 12), surpassing mainstream flash memories. This paper presents a non-volatile full-adder design based on complementary resistive switching memory cells and validates it through two NVM technologies: STT-MRAM and OxRRAM on 40 nm node. This architecture allows low power consumption. Thanks to the non-volatility and 3D integration of NVM, both standby power during " idle " state and data transfer power can be reduced. Using a low changing frequency can also control the switching power of NVM. The complementary cells and parallel data sensing enable fast computation and high reliability.

Domaines: Micro et nanotechnologies/Microélectronique

Y Zhang, Erya y Deng, Jacques-Olivier O Klein, Damien Querlioz, Dafiné Ravelosona, et al.. Synchronous Full-Adder based on Complementary Resistive Switching Memory Cells. 11th International New Circuits and Systems Conference (NEWCAS), Jun 2013, Paris, France. ⟨10.1109/NEWCAS.2013.6573578⟩. ⟨hal-01840795⟩