40 Gop/S/mm² Fixed-Point Operators for Brain Computer Interface in 65nm CMOS

Erwan Libessart 1, 2 Matthieu Arzel 3, 2, 4 Cyril Lahuec 3, 2, 4 Francesco Andriulli 1, 5
1 Lab-STICC_IMTA_MOM_PIM
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
3 Lab-STICC_IMTA_CACS_IAS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : The performance of non-invasive Brain-Computer Interface (BCI) depends on the computing performance of the system which solves the inverse problem. So the number of basic operations computed per second determines the BCI's resolution. An architecture with pipelined and parallelized flow is then required, and each operator in this architecture must be optimised to reach the highest possible computing performance. This paper presents the implementation of a fixed-point reciprocal and an inverse square root operators for the STMicroelectronics 65 nm CMOS technology. This paper follows previous works that optimise these operators on FPGA target. Each operator reaches a computing performance of about 40 Gop/s/mm², which improves the literature results by a factor of 5. Thus, this works fits well for portable and high performance BCI applications.
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Communication dans un congrès
2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, Florence, Italy. 2018, 〈10.1109/ISCAS.2018.8351028〉
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Soumis le : mardi 12 juin 2018 - 09:53:19
Dernière modification le : mardi 27 novembre 2018 - 07:54:01

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Erwan Libessart, Matthieu Arzel, Cyril Lahuec, Francesco Andriulli. 40 Gop/S/mm² Fixed-Point Operators for Brain Computer Interface in 65nm CMOS. 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, Florence, Italy. 2018, 〈10.1109/ISCAS.2018.8351028〉. 〈hal-01813164〉

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