Optimization of programming consumption of silicon nanocrystal memories for low power applications

V. Della Marca (1) , L. Masoero , G. Molas (2) , J. Amouroux , E. Petit-Faivre , J. Postel-Pellerin (1) , F. Lalande (1) , E. Jalaguier (2) , S. Deleonibus (2) , B. de Salvo (2) , P. Boivin , J-L. Ogier (3)

1 IM2NP - Institut des Matériaux, de Microélectronique et des Nanosciences de Provence
2 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
3 ST-ROUSSET - STMicroelectronics [Rousset]

In this paper we propose the optimization of the programming operation scheme of Silicon nanocrystal (Si-nc) memories in order to reduce the energy consumption for low power applications. Using the program kinetic characteristics and a dynamic current measurement method, the programming window and the energy consumption during Channel Hot Electrons programming are deeply analyzed; evaluating ramp and box pulse with various gate and drain voltage biases. Finally the critical role of the tunnel oxide is evaluated to satisfy both retention and consumption requirements.

Mots clés: Silicon nanocrystal memories; energy consumption; tunnel oxide thickness

Domaines: Micro et nanotechnologies/Microélectronique

V. Della Marca, L. Masoero, G. Molas, J. Amouroux, E. Petit-Faivre, et al.. Optimization of programming consumption of silicon nanocrystal memories for low power applications. 2012 International Semiconductor Conference Dresden-Grenoble (ISCDG) - formerly known as the Semiconductor Conference Dresden (SCD), Sep 2012, Grenoble, France. ⟨10.1109/ISCDG.2012.6359988⟩. ⟨hal-01760573⟩