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Design considerations of CMOS active inductor for low power applications

Abstract : Previous studies have shown that gm/ID (transconductance-to-drain-current) ratio based design is useful for optimizing analog circuits. In this paper, we explore challenges associated with designing a low-power active inductor. We focus in particular on sizing issues that arise as the transistor speed is maximized and the current consumption is minimized. Finally, we apply the results to design an amplifier integrated with an active inductor in 0.18μm CMOS process and show that by systematically working through sizing issues, a 10μA sub GHz amplifier can be designed.
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Contributor : Pietro Maris Ferreira <>
Submitted on : Wednesday, December 6, 2017 - 1:30:14 PM
Last modification on : Wednesday, September 16, 2020 - 5:40:29 PM



Jack Ou, Pietro Maris Ferreira. Design considerations of CMOS active inductor for low power applications. Analog Integrated Circuits and Signal Processing, Springer Verlag, 2018, 94 (3), pp.347-356. ⟨10.1007/s10470-017-1059-3⟩. ⟨hal-01657110⟩



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