A bit-accurate power estimation simulator for NoCs

Erwan Moréac 1 Johann Laurent 1 Pierre Bomel 1 André Rossi 2
1 Lab-STICC_UBS_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : Context: - Complex many-cores and SoCs contain one (if not several) NoCs. NoC power consumption can represent a significant proportion (40%) of the overall power consumption. Power/energy challenges: - Estimate NoC power consumption at system-level, and bit accurately, without the need for electrical simulations. "Is it possible to shorten the simulation and still get good estimations?" - Design and test new coding strategies to reduce power consumption on links. "What is the energy impact at system-level?" "Is a single coding strategy always the best fit?" - Design space exploration of coding strategies. "Is it realistic in terms of simulation time and precision?
Liste complète des métadonnées

https://hal.archives-ouvertes.fr/hal-01576044
Contributor : Erwan Moréac <>
Submitted on : Tuesday, August 22, 2017 - 10:42:42 AM
Last modification on : Monday, February 25, 2019 - 3:14:12 PM

File

Ubooth_Poster.pdf
Files produced by the author(s)

Identifiers

  • HAL Id : hal-01576044, version 1

Citation

Erwan Moréac, Johann Laurent, Pierre Bomel, André Rossi. A bit-accurate power estimation simulator for NoCs. DATE 2017 Design Automation and Test in Europe, Mar 2017, Lausanne, Switzerland. Design Automation and Test in Europe, ⟨https://www.date-conference.com/⟩. ⟨hal-01576044⟩

Share

Metrics

Record views

427

Files downloads

53