Hierarchical Static Timing Analysis for CMOS ULSI Circuits

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Conference papers
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https://hal.archives-ouvertes.fr/hal-01574139
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Submitted on : Friday, August 11, 2017 - 4:16:08 PM
Last modification on : Thursday, March 21, 2019 - 1:00:56 PM

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  • HAL Id : hal-01574139, version 1

Citation

Karim Dioury, Alain Greiner, Marie-Minerve Rosset-Louërat. Hierarchical Static Timing Analysis for CMOS ULSI Circuits. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU'99), Mar 1999, Monterey, CA, United States. pp.65-70. ⟨hal-01574139⟩

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