A family of redundant multipliers dedicated to fast computation for signal processing

Abstract : In view of the performance achieved through the use of the redundant addition, it would appear interesting to generalize the redundant notations (Carry Save, Borrow Save). To achieve this we require, as well the addition, a multiplication satisfying these notations. This paper presents the design of a set of multipliers spanning all possible I/O combinations, in redundant and conventional notations. We also describe the associated architectures and details of our method, which is based on parameterizable IP cores. The functions developed offer superior performance over conventional multipliers.
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Conference papers
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https://hal.archives-ouvertes.fr/hal-01573053
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Submitted on : Tuesday, August 8, 2017 - 1:51:23 PM
Last modification on : Thursday, March 21, 2019 - 1:09:50 PM

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Yannick Dumonteix, Habib Mehrez. A family of redundant multipliers dedicated to fast computation for signal processing. IEEE International Symposium on Circuits and Systems (ISCAS 2000), May 2000, Geneva, Switzerland. pp.325-328, ⟨10.1109/ISCAS.2000.857430⟩. ⟨hal-01573053⟩

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