Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect

Frédéric Pétrot (1) , Pascal Gomez (1)

1 ASIM - Architecture des Systèmes intégrés et Micro électronique

This paper relates our experience in designing from scratch a multi-threaded kernel for a MIPS R3000 on-chip multiprocessor. We briefly present the target architecture build around a VCI compliant interconnect, and the CPU characteristics. Then we focus on the implementation of part of the POSIX 1003.1b and 1003.1c standards. We conclude this case study by simulation results obtained by cycle true simulation of an MJPEG video decoder application on the multiprocessor using several scheduler organizations and architectural parameters.

Domaines: Informatique [cs]

Frédéric Pétrot, Pascal Gomez. Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect. Design Automation and Test in Europe Conference (DATE'2003) Embedded Software Forum, Mar 2003, Munich, Germany. pp.51-56, ⟨10.1109/DATE.2003.1253805⟩. ⟨hal-01529838⟩