Challenges and Solutions in Emerging Memory Testing

Elena Ioana Vatajelu (1) , P. Prinetto (2) , M. Taouil (3) , S. Hamdioui (3)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
2 Polito - Politecnico di Torino = Polytechnic of Turin
3 CE - Computer Engineering - Delft University of Technology

The research and prototyping of new memory technologies are getting a lot of attention in order to enable new (computer) architectures and provide new opportunities for today’s and future applications. Delivering high quality and reliability products was and will remain a crucial step in the introduction of new technologies. Therefore, appropriate fault modelling, test development and design for testability (DfT) is needed. This paper overviews and discusses the challenges and the emerging solutions in testing three classes of memories: 3D stacked memories, Resistive memories and Spin-Transfer-Torque Magnetic memories. Defects mechanisms, fault models, and emerging test solutions will be discussed.

Domaines: Micro et nanotechnologies/Microélectronique

Elena Ioana Vatajelu, P. Prinetto, M. Taouil, S. Hamdioui. Challenges and Solutions in Emerging Memory Testing. IEEE Transactions on Emerging Topics in Computing, 2017, PP (99), ⟨10.1109/TETC.2017.2691263⟩. ⟨hal-01528655⟩