Realization of a single layer graphene field effect transistor
Résumé
Graphene is a semiconductor with zero band gap, linear energy dispersion, and linear density of electronic states. One of its most important properties is a strong electric field effect which leads to an electrostatically tunable carrier density in the range of n < 1e14 cm-2. Together with high carrier mobilities for both electrons and holes (as high as 10000 cm2/V.s at room temperature), this attracts a lot of attention to graphene as a possible material for a future high-speed field effect transistor (FET). Graphene layer was synthetized from silicon carbide wafers (SiC) by evaporating Si atoms from 4HSiC surface at high temperature thanks to a high energy electron beam in UHV. The formation of single layer graphene has been confirmed by Raman spectroscopy: peaks at 1580 cm-1 (G-peak) and 2690 cm-1 (2D peak), originated from graphene in-plane vibrational modes. After deposition of SiO2 functional oxide, the whole layers were patterned to realize a FET device. The graphene channel has width about 40μm and length between 2μm and 16μm. The application of voltage up to 9V at room temperature on the binary oxide gate leads to on-off working operation with a variation about 600% of the drain current.