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Chapitre D'ouvrage Année : 1970

Trade-Offs In Scan Path and BIST Inplementations For RAMS

Résumé

In this article we propose efficient scan path and BIST schemes for RAMs. Tools for automatic generation of these schemes have been implemented. They reduce the design effort and thus allow the designer to select the more appropriate scheme with respect to various constraints.

Dates et versions

hal-01478904 , version 1 (28-02-2017)

Licence

Paternité - Pas d'utilisation commerciale

Identifiants

Citer

M. Nicolaidis, O. Kebichi, V. Castro Alves. Trade-Offs In Scan Path and BIST Inplementations For RAMS. Economics of Electronic Design, Manufacture and Test, kluwer academic publishers, pp.147-157, 1970, 978-1-4419-5142-7. ⟨10.1007/978-1-4757-5048-5_14⟩. ⟨hal-01478904⟩

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