Electrothermal evaluation of single and multiple solder void effects on low-voltage Si MOSFET behavior in forward bias conditions

Son Ha Tran (1, 2) , Laurent Dupont (1, 2) , Zoubir Khatir (1, 2)

1 IFSTTAR - Institut Français des Sciences et Technologies des Transports, de l'Aménagement et des Réseaux
2 SATIE - Systèmes et Applications des Technologies de l'Information et de l'Energie

Solder void thermal effects on power module performance and reliability were investigated long time ago. The final goal is to determine void acceptability criteria or to remove them. Our approach is not to offer a more efficient method for neglecting void formation, but to suggest a method for optimizing void thresholding from multiphysical viewpoint. The major achievement is in the complete combination of modeling, experiments and optimization for void effect evaluation purpose. Especially, it has been introduced for the first time a real new highly coupled and detailed 3D-FEM electrothermal model of low-voltage silicon MOSFET and the bonding wires in steady state. For single void case, the simulation results highlight local void effects on thermal performance of MOSFET in void area. However, no significant consequence on electrical performance is observed. Besides, the model shows a high dependence between void effects and back side metallization parameters. Electrical and thermal measurements performed on various single void configurations of experimental MOSFET prototypes offer a good agreement with numerical results. The study is then expanded to multi-voids case. The criticality of multi-voids corresponds to that of the most critical single void if the voids are not coalesced. These results offer an idea for a more optimized void inspection method in production line.

Mots clés: ELECTROTHERMAL MODELING; LOW-VOLTAGE MOSFET; DIE ATTACH; SOLDER; VOID

Mots clés: COMPOSANT ELECTRONIQUE; CARTE A PUCE; MODELISATION ELECTROTHERMIQUE

Domaines: Electronique

Son Ha Tran, Laurent Dupont, Zoubir Khatir. Electrothermal evaluation of single and multiple solder void effects on low-voltage Si MOSFET behavior in forward bias conditions. IEEE Transactions on Components, Packaging and Manufacturing Technology, 2017, 99, ⟨10.1109/TCPMT.2016.2633582⟩. ⟨hal-01466016⟩