Coping with SEUs/SETs in microprocessors by means of low-cost solutions: a comparative study and experimental results

M. Sonza Reorda (1) , B. Nicolescu (2) , M. Rebaudengo (1) , M. Violante (1) , Raoul Velazco (2)

1 Polito - Politecnico di Torino = Polytechnic of Turin
2 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

In this paper two lost-cost solutions for providing error detection capabilities to processor-based systems are compared. The effects of SEUs and SETs is studied through simulation-based fault injection which is used to compare the error detection capabilities of a hardware-implemented solution, based on parity code, with that of a software-implemented solution based on source-level code modification. Radiation testing experiments confirmed the obtained results.

Mots clés: microprocessors

Domaines: Micro et nanotechnologies/Microélectronique

M. Sonza Reorda, B. Nicolescu, M. Rebaudengo, M. Violante, Raoul Velazco. Coping with SEUs/SETs in microprocessors by means of low-cost solutions: a comparative study and experimental results. 6th European Conference on Radiation and its Effects on Components and Systems (RADECS'01), Sep 2001, Grenoble, France. ⟨hal-01388756⟩