Performance Improvement of FPGA Using Novel Multilevel Hierarchical Interconnection Structure

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https://hal.archives-ouvertes.fr/hal-01372838
Contributor : Habib Mehrez <>
Submitted on : Tuesday, September 27, 2016 - 4:46:44 PM
Last modification on : Thursday, March 21, 2019 - 2:31:34 PM

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  • HAL Id : hal-01372838, version 1

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Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Habib Mehrez, André Tissot. Performance Improvement of FPGA Using Novel Multilevel Hierarchical Interconnection Structure. Gilles Sassatelli and Leandro Soares Indrusiak and Manfred Glesner and Lionel Torres. ReCoSoC 2006 - 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, Jul 2006, Montpellier, France. Univ. Montpellier II, pp.117--123, 2006. 〈hal-01372838〉

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