Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator

Anis Boudabous (1) , Ahmed Ben Atitallah (1) , Lazhar Khriji (2) , Patrice Kadionik (3) , Nouri Masmoudi (1)

1 LETI - Laboratoire d'électronique et des technologies de l'Information [Sfax]
2 Dept. of Electrical and Computer Engineering
3 IMS - Laboratoire de l'intégration, du matériau au système

In this paper, a new hardware implementation of the Border-Preserving Interpolator is presented. The object of this proposed work is to achieve significant run time performance using a hardware development board. It also demonstrates consistent image quality performance among a variety of images. This validation show that our implementation based on HW/SW design speeds up the interpolation process as well as preserving a high image quality.

Mots clés: Nonlinear interpolation; color image; HW/SW; FPGA; Reconfigurable Architecture

Domaines: Micro et nanotechnologies/Microélectronique

Anis Boudabous, Ahmed Ben Atitallah, Lazhar Khriji, Patrice Kadionik, Nouri Masmoudi. Architecture and HW/SW validation of nonlinear Border-Preserving Interpolator. DTIS: International Conference on Design & Technology of Integrated Systems in Nanoscale, May 2012, Gammarth, Tunisia. ⟨10.1109/DTIS.2012.6232968⟩. ⟨hal-01306335⟩