Efficient Architecture and Implementation of Vector Median Filter in Co-Design Context

Anis Boudabous (1) , Lazhar Khriji (2) , Ahmed Ben Atitallah (1) , Patrice Kadionik (3) , Nouri Masmoudi (1)

1 LETI - Laboratoire d'électronique et des technologies de l'Information [Sfax]
2 Dept. of Electrical and Computer Engineering
3 IMS - Laboratoire de l'intégration, du matériau au système

This work presents an efficient fast parallel architecture of the Vector Median Filter (VMF) using combined hardware/software (HW/SW) implementation. The hardware part of the system is implemented using VHDL language, whereas the software part is developed using C/C++ language. The software part of the embedded system uses the NIOS-II softcore processor and the operating system used is μClinux. The comparison between the software and HW/SW solutions shows that adding a hardware part in the design attempts to speed up the filtering process compared to the software solution. This efficient embedded system implementation can perform well in several image processing applications.

Mots clés: Color image; FPGA; SoPC; NIOS-II; VMF

Domaines: Micro et nanotechnologies/Microélectronique

Anis Boudabous, Lazhar Khriji, Ahmed Ben Atitallah, Patrice Kadionik, Nouri Masmoudi. Efficient Architecture and Implementation of Vector Median Filter in Co-Design Context. Radioengineering, 2007, 16 (3). ⟨hal-01305097⟩