Using Compact MOS Models for Hierarchical Sizing and Biasing of Analog IPs

Farakh Javid (1) , Ramy Iskander (1) , Marie-Minerve Louërat (1) , Damien Dupuis (1)

1 CIAN - Circuits Intégrés Numériques et Analogiques

Domaines: Informatique [cs]

Farakh Javid, Ramy Iskander, Marie-Minerve Louërat, Damien Dupuis. Using Compact MOS Models for Hierarchical Sizing and Biasing of Analog IPs. IEEE MOS-AK/GSA Workshop, Apr 2011, Paris, France. IEEE MOS-AK/GSA Workshop, pp.1-2. ⟨hal-01286039⟩