Reducing the impact of internal upsets inside the correlation process in GPS Receivers

Mohamed Mourad Hafidhi (1) , Emmanuel Boutillon (1) , Chris Winstead (2)

1 Lab-STICC_UBS_CACS_IAS
2 USU - Utah State University

—This paper 1 examines two approaches to deal with internal logic upsets inside correlation process used in the tracking process of GPS receivers. These upsets can be produced due to process/voltage and temperature variations coupled with increased advancement of CMOS technology. If any upset occurs when computing the correlation function during each 10 ms, then errors are propagated in tracking loops, resulting in a loss of the GPS signal tracking and a distorted position given by the receiver. Results of experiments using a GPS receiver design are presented in this paper to evaluate the performance of each method. The two proposed solutions (the Feedback freezing loop (FFL) and the Last Correct Value (LCV) methods) offer a big interest compared to the classical Triple Modular Redundancy (TMR) method since they provide the same performance as the TMR with low area complexity. This work can be extended to any system using feedback loops information.

Mots clés: internal upsets; GPS receivers; correlation process; TMR

Domaines: Sciences de l'ingénieur [physics]

Mohamed Mourad Hafidhi, Emmanuel Boutillon, Chris Winstead. Reducing the impact of internal upsets inside the correlation process in GPS Receivers. Conference on Design and Architectures for Signal and Image Processing (DASIP 2015), Sep 2015, Cracow, Poland. 2015, Sep 2015, Krakow, Poland. ⟨hal-01211180⟩