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Communication-aware Parallelization Strategies for High Performance Applications.

Imran Ashraf 1 Nader Khammassi 2 Koen Bertels 3 Jean-Christophe Le Lann 2 
STIC - Département STIC [Brest], Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : With the advent of multicore processor architectures and the existence of a huge legacy code base, the need for efficient and scalable parallelizing compilers is growing. Where multi-core processors were seen as the way forward to address the known challenges such as the memory, power and ILP wall, efficient parallelization to make use of the multiple cores, is still an open issue. In this paper, we present two complementary tools, MCROF and XPU which provide an alternative development path to parallelize applications and that address the challenges of identifying potential parallelism and exploiting it in a different way. The MCROF tool provides a detailed profile of the data flowing inside an application and the XPU programming paradigm provides an intuitive and simple interface to express parallelism as well as the necessary runtime support. We demonstrate through two different use cases that better performance up to 4× can be achieved than available commercial compilers.
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Submitted on : Thursday, July 9, 2015 - 10:44:22 AM
Last modification on : Monday, March 14, 2022 - 11:08:13 AM


  • HAL Id : hal-01174435, version 1


Imran Ashraf, Nader Khammassi, Koen Bertels, Jean-Christophe Le Lann. Communication-aware Parallelization Strategies for High Performance Applications.. ISVLSI'15 - IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France. ⟨hal-01174435⟩



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