Modeling of signal integrity in bus communications with timed data flow SystemC-AMS

Ruomin Wang 1 Julien Denoulet 1 Sylvain Feruglio 1 Farouk Vallette 1 Patrick Garda 1
1 SYEL - Systèmes Electroniques
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : The paper presents a new method for modeling the functionality and Signal Integrity (SI) performances of bus communications at a high level of abstraction. Using neural networks, we build a SystemC/SystemC-AMS virtual platform that combines functional modules, which represent the operative behavior of the system, and non-functional modules based on neural network approximation, which display the systems SI characteristics. Our method was demonstrated by modeling a Universal Serial Bus 3.0 (USB 3.0) system and was applied to the prediction of transient waveforms and eye diagrams. Compared to a HSPICE simulation, our method achieves excellent accuracy (mean absolute error of 1%) with a much shorter simulation time (×6000 speedup).
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Conference papers
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https://hal.archives-ouvertes.fr/hal-00968667
Contributor : Ruomin Wang <>
Submitted on : Tuesday, April 1, 2014 - 1:18:09 PM
Last modification on : Thursday, March 21, 2019 - 2:30:28 PM

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  • HAL Id : hal-00968667, version 1

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Ruomin Wang, Julien Denoulet, Sylvain Feruglio, Farouk Vallette, Patrick Garda. Modeling of signal integrity in bus communications with timed data flow SystemC-AMS. FDL 2013 - Forum on Specification Design Languages, Sep 2013, Paris, France. pp.1-6. ⟨hal-00968667⟩

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