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Communication Dans Un Congrès Année : 2013

Evaluating Architecture and Compiler Design through Static Loop Analysis

Résumé

Using the MAQAO loop static analyzer, we characterize a corpus of binary loops extracted from common benchmark suits such as SPEC, NAS, etc. and several industrial applications. For each loop, MAQAO extracts low-level assembly features such as: integer and floating-point vectorization ratio, number of registers used and spill-fill, number of concurrent memory streams accessed, etc. The distributions of these features on a large representative code corpus can be used to evaluate compilers and architectures and tune them for the most frequently used assembly patterns. In this paper, we present the MAQAO loop analyzer and a characterization of the 4857 binary loops. We evaluate register allocation and vectorization on two compilers and propose a method to tune loop buffer size and stream prefetcher based on static analysis of benchmarks.
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Dates et versions

hal-00952298 , version 1 (26-02-2014)

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Yuriy Kashnikov, Pablo de Oliveira Castro, Emmanuel Oseret, William Jalby. Evaluating Architecture and Compiler Design through Static Loop Analysis. 2013 International Conference on High Performance Computing and Simulation (HPCS), Jul 2013, Finland. pp.535 - 544, ⟨10.1109/HPCSim.2013.6641465⟩. ⟨hal-00952298⟩

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