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Communication Dans Un Congrès Année : 2013

Heterogeneous CPU/FPGA reconfigurable computing system for avionic test application

Résumé

Real-time computing systems are increasingly used in aerospace and avionic industries. In the face of power wall and real-time requirements, hardware designers are directed towards reconfigurable computing with the usage of heterogeneous CPU/FPGA systems. However, there is a lack of real-time environments able to deal with the execution of applications on such heterogeneous systems dedicated to avionic Test and Simulation (T&S). This research investigates the problem of soft real-time environments for CPU/FPGA systems and proposes first a high-performance hardware architecture used to implement intimately coupled hardware and software avionic models. Second, this paper presents the description of an efficient real-time software environment for the model's execution, the multi-core CPU monitoring and the runtime task re-allocation to avoid the timing constraint violation. Experimental results underpin the industrial relevance of the presented approach for avionic T&S systems with real-time support.
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Dates et versions

hal-00922004 , version 1 (23-12-2013)

Identifiants

  • HAL Id : hal-00922004 , version 1

Citer

George Afonso, Zeineb Baklouti, David Duvivier, Rabie Ben Atitallah, Eli Billauer, et al.. Heterogeneous CPU/FPGA reconfigurable computing system for avionic test application. IEEE 27th International Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), May 2013, Cambridge, United Kingdom. ⟨hal-00922004⟩
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