Interrupt Timed Automata: verification and expressiveness

Béatrice Bérard 1 Serge Haddad 2, 3 Mathieu Sassolas 1, *
* Corresponding author
1 MoVe - Modélisation et Vérification
LIP6 - Laboratoire d'Informatique de Paris 6
2 MEXICO - Modeling and Exploitation of Interaction and Concurrency
LSV - Laboratoire Spécification et Vérification [Cachan], ENS Cachan - École normale supérieure - Cachan, Inria Saclay - Ile de France, CNRS - Centre National de la Recherche Scientifique : UMR8643
Abstract : We introduce the class of Interrupt Timed Automata (ITA), a subclass of hybrid automata well suited to the description of timed multi-task systems with interruptions in a single processor environment. While the reachability problem is undecidable for hybrid automata we show that it is decidable for ITA. More precisely we prove that the untimed language of an ITA is regular, by building a finite automaton as a generalized class graph. We then establish that the reachability problem for ITA is in NEXPTIME and in PTIME when the number of clocks is fixed. To prove the first result, we define a subclass ITA− of ITA, and show that (1) any ITA can be reduced to a language-equivalent automaton in ITA− and (2) the reachability problem in this subclass is in NEXPTIME (without any class graph). In the next step, we investigate the verification of real time properties over ITA. We prove that model checking SCL, a fragment of a timed linear time logic, is undecidable. On the other hand, we give model checking procedures for two fragments of timed branching time logic. We also compare the expressive power of classical timed automata and ITA and prove that the corresponding families of accepted languages are incomparable. The result also holds for languages accepted by controlled real-time automata (CRTA), that extend timed automata. We finally combine ITA with CRTA, in a model which encompasses both classes and show that the reachability problem is still decidable. Additionally we show that the languages of ITA are neither closed under complementation nor under intersection.
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Contributor : Mathieu Sassolas <>
Submitted on : Wednesday, March 28, 2012 - 12:06:48 PM
Last modification on : Monday, December 17, 2018 - 1:34:19 AM
Document(s) archivé(s) le : Friday, June 29, 2012 - 2:24:26 AM


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Béatrice Bérard, Serge Haddad, Mathieu Sassolas. Interrupt Timed Automata: verification and expressiveness. Formal Methods in System Design, Springer Verlag, 2012, 40 (1), pp.41-87. ⟨10.1007/s10703-011-0140-2⟩. ⟨hal-00683279⟩



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