I-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems

M. Nicolaidis (1) , V. Pasca (1) , Lorena Anghel (1)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

In 3D integrated systems, Thru-Silicon-Vias (TSVs) enable higher performance and energy efficiency, by reducing the data travel distances. However, the TSV manufacturing and wear-out defect rates lead to poor interconnect reliability and yield. The high fault rates and TSV footprint make spare-based repair solutions inefficient. I-BIRAS combines self-repair and adaptive serialization to increase yield and circuit life at the cost of lower throughput. After the interconnect test, the diagnosis vector DV is used to perform the self-repair and adaptive serialization to increase yield and circuit life at the cost of lower throughput. After the interconnect test, the diagnosis vector DV is used to perform the self-repair and adaptive serialization. The design parameters are the number of data bits n, the number of spare TSVs r, and the minimum acceptable number mLIMIT of fault-free TSVs. If the number of fault-free TSVs is less than mLIMIT then the link assumed failed.

Mots clés: Integrated Circuits; built-in-self-repair

Domaines: Micro et nanotechnologies/Microélectronique

M. Nicolaidis, V. Pasca, Lorena Anghel. I-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems. 16th IEEE European Test Symposium (ETS'11), May 2011, Trondheim, Norway. pp.208 - 208, ⟨10.1109/ETS.2011.37⟩. ⟨hal-00651916⟩