Fully Distributed Initialization Procedure for a 2D-Mesh NoC, Including Off Line BIST and Partial Deactivation of Faulty Components

Zhen Zhang (1) , Alain Greiner (1) , Mounir Benabdenbi (2)

1 ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce
2 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

In this paper, we present an embedded, at speed, off-line, and fully distributed initialization procedure for 2D-Mesh Network-on-Chip (NoC). This procedure is executed at power boot, and targets the detection and the deactivation of the faulty routers and/or faulty communication channels. The final objective is fault tolerance. The proposed procedure is able to clean the NoC from all destructive malfunctions induced by permanent hardware failures. This initialization procedure has been implemented in a reconfigurable version of the DSPIN micro-network, and evaluated from the point of view of Stuck-at fault coverage, and area overhead.

Mots clés: Network-on-Chip; BIST; NoC TEST; Deactivation; NoC Reconfiguration

Domaines: Architectures Matérielles [cs.AR]

Zhen Zhang, Alain Greiner, Mounir Benabdenbi. Fully Distributed Initialization Procedure for a 2D-Mesh NoC, Including Off Line BIST and Partial Deactivation of Faulty Components. The 16th IEEE International On-Line Testing Symposium (IOLTS), Jun 2010, Corfu, Greece. pp.194-196, ⟨10.1109/IOLTS.2010.5560209⟩. ⟨hal-00591795⟩