A 40nm CMOS, 1.27nJ, 330mV, 600kHz, Bose Chaudhuri Hocquenghem 252 bits frame decoder

S. Clerc (1) , F. Abouzeid (1, 2) , V. Heinrich (1) , A. Jain (1) , A. Veggetti (1) , D. Crippa (1) , P. Roche (3) , G. Sicard (2)

1 STMicroelectronics
2 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
3 IMR - Interactions et Modulateurs de Réponses

Following the will to answer to the energy constrained applications requirements, an Ultra-Low Voltage (ULV) 40nm Bose-Chaudhuri-Hocquenghem (BCH) error-correcting circuit is presented. Mapped on a ULV specific standard cells library, the circuit was designed following standard industrial implementation and verification flows. The BCH circuit runs at 0.330V, 600kHz frequency and needs 1.27nJ to decode a 252bits frame. With 14% of extra power compared to typical process, applying forward bias enables to compensate temperature and skewed process effects, regaining 150mV minimum operating voltage.

Mots clés: CMOS-integrated-circuits

Domaines: Micro et nanotechnologies/Microélectronique

S. Clerc, F. Abouzeid, V. Heinrich, A. Jain, A. Veggetti, et al.. A 40nm CMOS, 1.27nJ, 330mV, 600kHz, Bose Chaudhuri Hocquenghem 252 bits frame decoder. IEEE International Conference on Integrated Circuit Design and Technology (ICICDT'10), Jun 2010, Grenoble, France. pp.78-81, ⟨10.1109/ICICDT.2010.5510284⟩. ⟨hal-00569011⟩