A Digitally Tuned Voltage Controlled Delay Element for 1-10GHz DLL-based Frequency Synthesis

Abstract : This paper presents an original topology for Voltage Controlled Delay Element used in a DLL-based oscillator. This cell works from 1 to 10GHz achieving the phase noise performances required for the targeted wireless standards. The current consumption is lower than 9mA under 1V supply voltage. Thanks to the new topology a delay bank control scheme is feasible, paving the way to digitally controlled DLL.
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Conference papers
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https://hal.archives-ouvertes.fr/hal-00380884
Contributor : Equipe Conception de Circuits <>
Submitted on : Monday, May 4, 2009 - 4:10:28 PM
Last modification on : Wednesday, October 9, 2019 - 9:30:27 PM

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  • HAL Id : hal-00380884, version 1

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Pierre-Olivier Lucas de Peslouan, Cédric Majek, Thierry Taris, Yann Deval, Didier Belot, et al.. A Digitally Tuned Voltage Controlled Delay Element for 1-10GHz DLL-based Frequency Synthesis. NEWCAS – TAISA'09, Jun 2009, Toulouse, France. pp.51-69. ⟨hal-00380884⟩

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