CMOS SFFDS PA with Coupled Transformer for High Power RF Applications
Résumé
This paper presents a 65nm CMOS power amplifier (PA) using a coupled transformer. The PA is based on an original structure, called Stacked Folded Fully Differential Structure (SFFDS). It is applied to the UMTS W-CDMA standard. The parallel SFFDS power amplifier provides 30.5 dBm of output power with 20% of power added efficiency (PAE) at 1.95 GHz. The output compression point (OCP1) is 27.5 dBm and the PA is linear up to 24 dBm in order to meet the maximum output power required by the UMTS W-CDMA standard