A Low Phase Noise and Wide-Bandwidth BiCMOS SiGe:C 0.25µm Digital Frequency Divider For An On-Chip Phase-Noise Measurement Circuit

Sylvain Godet (1, 2) , Éric Tournier (1, 2) , Olivier Llopis (1) , Andreia Cathelin (3) , Julien Juyon (1, 2)

1 LAAS - Laboratoire d'analyse et d'architecture des systèmes
2 UT3 - Université Toulouse III - Paul Sabatier
3 ST-CROLLES - STMicroelectronics [Crolles]

A low phase noise and wide-bandwidth frequency divider has been developed in a 0.25 µm SiGe:C process. This paper discusses the BiCMOS design improvements used for ultra low phase noise applications like on-chip phase-noise measurement circuit. From a single-ended signal provided by a local oscillator LO, the wide-bandwidth frequency divider circuit generates accurate quadrature signals. For the full 1kHz-5.5 GHz input frequency range, the frequency divider achieves an output quadrature error less than ±1°. This paper presents a novel architecture designed for improving phase noise and exhibits a measured residual phase noise of –164 dBc/Hz @ 100 kHz with a 3.5 GHz input frequency.

Mots clés: frequency divider; On-chip phase-noise measurement circuit; Silicon bipolar/BiCMOS process technology; RF analog circuits; low phase noise; frequency divider.

Domaines: Electronique

Sylvain Godet, Éric Tournier, Olivier Llopis, Andreia Cathelin, Julien Juyon. A Low Phase Noise and Wide-Bandwidth BiCMOS SiGe:C 0.25µm Digital Frequency Divider For An On-Chip Phase-Noise Measurement Circuit. 2008. ⟨hal-00358067v1⟩