Generation of Test Programs for the Assertion-Based Verification of TLM Models

Abstract : The context of this paper is the dynamic ABV (Assertion-Based Verification) of TLM (Transaction Level Modeling) SystemC specifications, which characterize SoCs at a very high level of abstraction. We use a framework for supervising during the SystemC simulation the verification of temporal properties expressed in the PSL language. The efficiency of this approach can be improved by the selection of well-chosen stimuli that enable the analysis of a range of nominal behaviors as well as of corner cases. To that goal, the simulation/monitoring environment is coupled with the combinatorial testing tool Tobias that builds on the experience of the test engineer captured in test patterns to define sets of interesting test cases.
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Contributor : Lucie Torella <>
Submitted on : Monday, January 19, 2009 - 1:51:25 PM
Last modification on : Thursday, October 11, 2018 - 8:48:01 AM

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  • HAL Id : hal-00354257, version 1

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L. Ferro, L. Pierre, Y. Ledru, L. Du Bousquet. Generation of Test Programs for the Assertion-Based Verification of TLM Models. IEEE International Design and Test Workshop (IDT'08), Dec 2008, Monastir, Tunisia. pp.237-242. ⟨hal-00354257⟩

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