On Multiple Slice Turbo Code

David Gnaedig (1) , Emmanuel Boutillon (1) , Michel Jezequel (2, 3) , Vincent C. Gaudet (4) , P. Glenn Gulak (5)

1 LESTER - Laboratoire d'Electronique des Systèmes TEmps Réel
2 TAMCIC - Traitement Algorithmique et Matériel de la Communication, de l'Information et de la Connaissance
3 ELEC - Département Electronique
4 Dept. of ECE
5 ECE - Department of Electrical and Computer Engineering [University of Toronto]

The main problem with the hardware implementation of turbo codes is the lack of parallelism in the MAP-based decoding algorithm. This paper proposes to overcome this problem with a new family of turbo codes, called Slice Turbo Codes. This family is based on two ideas: the encoding of each dimension with P independent tail-biting codes and a constrained interleaver structure that allows parallel decoding of the P independent codewords in each dimension. The optimization of the interleaver is described. A high degree of parallelism is obtained with equivalent or better performance than the best known turbo codes. The parallel architecture allows reduced complexity turbo decoding for very high throughput applications.

Mots clés: interleaver; high speed; slice; Turbo code; Architecture; VLSI

Domaines: Electronique

David Gnaedig, Emmanuel Boutillon, Michel Jezequel, Vincent C. Gaudet, P. Glenn Gulak. On Multiple Slice Turbo Code. 3nd International Symposium on Turbo Codes and Related Topics, 2003, Brest, France. ⟨hal-00068934⟩