Design Space Exploration of DSP Applications Based on Behavioral Description Models

F. Thabet (1) , Philippe Coussy (2) , Dominique Heller (2) , E. Martin (1)

1 LESTER - Laboratoire d'Electronique des Systèmes TEmps Réel
2 Lab-STICC_UBS_CACS_MOCS

Exploring different communication architectures and timing behaviors is a key concept in modern system design flows. This paper describes a Behavioral Description Model (BDM) that allows the design space exploration of DSP applications at different abstraction levels. The proposed approach consists in embedding a sequential function into a BDM object that includes a set of I/O and control processes. Communication architectures and timing behaviors (I/O scheduling, I/O parallelism...) can be varied and explored easily by adding I/O and control code into the dedicated concurrent processes while keeping the functionality description unchanged throughout the refinement steps. Although the proposed approach leads to slower simulation compared to a rewrite of the model for the desired I/O scheme, it allows much faster exploration because models do not have to be rewritten for every I/O scheme to be explored.

F. Thabet, Philippe Coussy, Dominique Heller, E. Martin. Design Space Exploration of DSP Applications Based on Behavioral Description Models. IEEE Workshop on Signal Processing Systems Design and Implementation SIPS, 2006, France. pp.0. ⟨hal-00105126⟩