Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chip

Alain Greiner (1) , Frédéric Pétrot (2) , Mathieu Carrier (1) , Mounir Benabdenbi (1) , Roselyne Chotin-Avot (3) , Raphaël Labayrade (4)

1 ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce
2 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
3 CIAN - Circuits Intégrés Numériques et Analogiques
4 INRETS - Institut National de Recherche sur les Transports et leur Sécurité

In this paper, we present the implementation of a multi-threaded software application for pre-crash obstacle detection, using stereo vision, and the "V-disparity" algorithm, that requires intensive computation. This application runs on a generic, low cost, massively parallel, multi-processor system-on-chip (MP-SoC). This hardware architecture is suitable for automotive area with respect to performance, cost, and flexibility constraints. This hardware/software embedded application is able to process 40 stereoscopic pairs per second with 256 lines of 512 pixels images and a disparity range of 256. Our architecture is made of 8 clusters, 30 general-purpose 32-bit processors and 750 Kbytes embedded memory.

Mots clés: hardware/software

Domaines: Micro et nanotechnologies/Microélectronique

Alain Greiner, Frédéric Pétrot, Mathieu Carrier, Mounir Benabdenbi, Roselyne Chotin-Avot, et al.. Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chip. IV 2006 - IEEE Intelligent Vehicles Symposium, Jun 2006, Tokyo, Japan. pp.370-376, ⟨10.1109/IVS.2006.1689656⟩. ⟨hal-00103535⟩