Early dependability evaluation: injection of multiple bit-flips

K. Hadjiat (1) , Régis Leveugle (1)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

Fault injection in VHDL descriptions has become an efficient solution to analyze at an early stage of the design the potential faulty behaviors of a complex digital circuit. Classical injection campaigns are based on the “single bit-flip” fault model. We discuss in this paper the need for an extension to multiple bit-flips. The generation of VHDL mutants for this extended model is presented and we show how several fault models can be combined in a single fault injection campaing by means of an heterogenous mutant generation. Trade-offs between complexity and generality are also explored in case of experiments based on emulation. Practical results are presented on significant examples.

Mots clés: fault injection; VHDL

Domaines: Micro et nanotechnologies/Microélectronique

K. Hadjiat, Régis Leveugle. Early dependability evaluation: injection of multiple bit-flips. Proceedings of the 6th IEEE Latin-American Test Workshop (LATW'05), Salvador, March 30 - April 2, 2005, Bahia, Brazil. pp.109-114. ⟨hal-00101580⟩